1. Technical Field
This disclosure is directed to electronic systems, and more particularly, to memory subsystems.
2. Description of the Related Art
Memory subsystems in computers and other electronic systems typically require various operations to be performed to ensure proper operation. In memory subsystems using dynamic random access memory (DRAM), refreshes are periodically performed to ensure the integrity of the stored data, which can be affected by leakage currents. One type of refresh may include reading the data stored in the memory and writing it back to the memory. Some DRAM components are also configured to perform a self-refresh, which involves entering a low power state and is performed independently of a memory controller.
Calibrations of data strobe signals may also be performed in memory subsystems. A data strobe signal is a clock signal that is used to synchronize data that is read from or written to a memory. In some systems, separate data strobe signals are provided for read and write operations. Calibrating the data strobe signals includes aligning clock edges of the data strobe with data conveyed to and/or from the memory to ensure sufficient setup and hold times for each data bit.
Some memory subsystems include multiple channels, or interfaces, coupled between a memory controller and a corresponding memory. Each channel may include its own data strobe signal(s). Calibrations of these data strobe signals are typically staggered such that some channels remain available for performing memory accesses while calibrations are being performed on others. Similarly, refreshes may also be staggered to ensure the availability of at least some memory channels while others are refreshed.